Sadly diagonal wires aren’t allowed by the fabs (at least on layers that would be relevant here).
As well as non-90° angles when dividing the wafer into chips, probably. Well, I was already thinking of tiling chiplets, which the README doesn't mention.
As well as non-90° angles when dividing the wafer into chips, probably. Well, I was already thinking of tiling chiplets, which the README doesn't mention.