In thumb, it can encode 0..31
And Arm dropped a T16-like encoding entirely from their 64 bit instruction set.
If they did everything exactly the same they would be the same ISA not different ISAs.
It's just as easy to point to things that RVC can do that T16 can't.
You need to look at a far larger picture to decide on who made the better decisions overall.
Honestly, I would feel uncomfortable if I were designing an instruction encoding and came up with some addressing mode format where there are two bits for a displacement. I would pull myself aside and have a word with myself. That's just me, though.
And Arm dropped a T16-like encoding entirely from their 64 bit instruction set.
If they did everything exactly the same they would be the same ISA not different ISAs.
It's just as easy to point to things that RVC can do that T16 can't.
You need to look at a far larger picture to decide on who made the better decisions overall.
Honestly, I would feel uncomfortable if I were designing an instruction encoding and came up with some addressing mode format where there are two bits for a displacement. I would pull myself aside and have a word with myself. That's just me, though.