Thanks for the links. This doesn't seem to be a true RISC-V MMU (according to the Sv32 specification) integrated into the CPU core itself, but just a peripheral designed for memory mapped SPI flash and PSRAM. So as far as I understand there is no true process isolation with page faults and dynamic paging.
Ok, I see. The S3’s "MMU" is just an external-memory mapper, not a virtual-memory MMU. The S31 apparently has both, that mapper plus an architectural CPU-side Sv32 MMU; that offers indeed a lot of interesting possibilities. Even sel4 would run on this machine as it seems. The ARM world has no microcontroller with a true MMU as far as I know. Risc-V now has at least two (here is the other one: https://www.bunniestudios.com/blog/2026/baochip-1x-a-mostly-...).
The Microchip PIC32MZ MCU has an MMU as well. But not with wireless options in a 8x8 QFN80 package like this ESP32-S31. That's pretty small. No flash though.
Yeah, nommu Linux basically cannot run normal ELF since there is no virtual memory which is needed for relative addressing and relocations. You are mostly left with classical formats like AT&T a.out only
You wouldn’t be able to guarantee execution of arbitrary ELF, but couldn’t you intentionally build non-PIC-compiled ELF executables where the section base addresses as defined in the header must match the MMU region “slots” the host provides?
This is for the recently released ESP32-S31 which does have a MMU, unlike the ESP32-S3.
The author has more details in this reddit post: https://eddrit.com/r/esp32/comments/1vait52/mmu_linux_on_the... And the docs section of the repo: https://github.com/GrieferPig/esp32-s31-linux/tree/main/docs...
Thanks for the links. This doesn't seem to be a true RISC-V MMU (according to the Sv32 specification) integrated into the CPU core itself, but just a peripheral designed for memory mapped SPI flash and PSRAM. So as far as I understand there is no true process isolation with page faults and dynamic paging.
Sv32 is what every 32-bit RISC-V CPU with an MMU uses. It is a full MMU. You can run Linux on it.
Sure, but what the S31 calls "MMU" is not an Sv32 MMU; therefore my comment.
The documentation states:
> Compliant with RISC-V Sv32 virtual memory scheme
https://documentation.espressif.com/esp32-s31_datasheet_en.p...
Ok, I see. The S3’s "MMU" is just an external-memory mapper, not a virtual-memory MMU. The S31 apparently has both, that mapper plus an architectural CPU-side Sv32 MMU; that offers indeed a lot of interesting possibilities. Even sel4 would run on this machine as it seems. The ARM world has no microcontroller with a true MMU as far as I know. Risc-V now has at least two (here is the other one: https://www.bunniestudios.com/blog/2026/baochip-1x-a-mostly-...).
The Microchip PIC32MZ MCU has an MMU as well. But not with wireless options in a 8x8 QFN80 package like this ESP32-S31. That's pretty small. No flash though.
There is actually precedent for nommu Linux, though it obviously has tradeoffs.
Yeah, nommu Linux basically cannot run normal ELF since there is no virtual memory which is needed for relative addressing and relocations. You are mostly left with classical formats like AT&T a.out only
You wouldn’t be able to guarantee execution of arbitrary ELF, but couldn’t you intentionally build non-PIC-compiled ELF executables where the section base addresses as defined in the header must match the MMU region “slots” the host provides?