1 petabyte per 60 second scans implies a kind of comical data rate to storage, even at RAM speeds that’s implausible. Imagine we need to write these to hard drives, they happily sustain 150Mb/s on the high end, which would imply you’d need 115,000 hard drives to absorb that amount of writes. Even with top end NVMe drives you’d need a thousand of them writing simultaneously.
That's likely the datarate of the ADC chips. You would downsample them directly on the FPGA board and maybe perform an FFT or similar transform. 16 TB/s across a few dozen FPGA boards is nothing crazy. After some early stages in the signal processing you might transfer 1 or 2 TB/s over ethernet to the servers. Entirely feasible considering we have 800 gigabit/s ethernet.
You’re completely right, this is why currently ultrasound reconstruction happens on FPGAs. They would need a lot of them given the number of transducers. https://pmc.ncbi.nlm.nih.gov/articles/PMC6057541/
There's probably compute done on ram to reduce the file size before it hits disk. Definitely going to be redundant information in the scan.