Part of the delay is really just commercial. Fabs are optimized for utilization - throughput, not latency. A fab operator will prefer to queue up a load of work with as few gaps as possible, and your shuttle service run has to fit in one of the gaps. If you're NVIDIA and you've already booked the fab, there might not be so much delay. But not zero.
Just to buttress and embroider around your point that a fab is not a small business:
If there was a realistic way even to go from bare wafers to non-trivial custom chips in a small-batch fashion, you can bet there would be a cottage industry around it. I would love to live in a world where I could manufacture custom silicon as easily as I can manufacture a custom PCB or custom mechanical part.
But as it stands, quick-turn, rapid-proto "micro" fabs are obscenely expensive, to the extent that if you aren't absolutely certain you need the performance gains from custom silicon, justified by years of R&D that confirms the inadequacy of a multi-chip solution, then the idea is killed before any layout engineer is contacted.
Microfabs are either operated by research institutes, or they're booked solid for years, and basically printing money.
IMEC is a lab, not a fab. They have partnerships with all major fabs for driving research forwards and making prototypes and concepts, but they don't manufacture anything there, it's still up to Samsung, Intel or TSMC to try out whatever IMEC comes up with.
They may have lasers, electron microscopes, probes, etc on-site for testing what Intel or TSMC ship them and verify research results, but that's pretty far away from a "cottage industry".
Intel and Samsung are the true "cottage industries" as they do full vertical integration of IP, R&D and manufacturing under the same roof.
IMEC is more like the UN of semi companies, a place for them to come together, share knowledge and results and talk standardisation based on that.
Accelerating the process is an incredibly obvious desire for literally everyone in the industry and there are already gobs of money being put into R&D.
The fact of the matter is that we're dealing with physical and chemical processes. It simply takes time for atoms to move across space. In many steps of the semiconductor fab process we are literally building up the chip by single-atom thick layers.
There's very finite limits to how fast you can throw atoms at a substrate. There are finite limits to how much time a photoresist must be exposed. There are finite limits to how fast chemicals can etch the surface. You can only saw a wafer so fast, you can only physically transport dice through space so fast.
These are problems that the entire industry wants to solve. These are problems at the bleeding edge of physics. This is not something a startup is going to solve, purely because you need to already have an entire semiconductor fab to iterate in.
A fab is not a small business!
Part of the delay is really just commercial. Fabs are optimized for utilization - throughput, not latency. A fab operator will prefer to queue up a load of work with as few gaps as possible, and your shuttle service run has to fit in one of the gaps. If you're NVIDIA and you've already booked the fab, there might not be so much delay. But not zero.
Nice little backgrounder: https://siliconmasters.co/blogs/our-blog/how-photomasks-for-...
Just to buttress and embroider around your point that a fab is not a small business:
If there was a realistic way even to go from bare wafers to non-trivial custom chips in a small-batch fashion, you can bet there would be a cottage industry around it. I would love to live in a world where I could manufacture custom silicon as easily as I can manufacture a custom PCB or custom mechanical part.
But as it stands, quick-turn, rapid-proto "micro" fabs are obscenely expensive, to the extent that if you aren't absolutely certain you need the performance gains from custom silicon, justified by years of R&D that confirms the inadequacy of a multi-chip solution, then the idea is killed before any layout engineer is contacted.
Microfabs are either operated by research institutes, or they're booked solid for years, and basically printing money.
The closest thing to that cottage industry is IMEC.
IMEC is a lab, not a fab. They have partnerships with all major fabs for driving research forwards and making prototypes and concepts, but they don't manufacture anything there, it's still up to Samsung, Intel or TSMC to try out whatever IMEC comes up with.
They may have lasers, electron microscopes, probes, etc on-site for testing what Intel or TSMC ship them and verify research results, but that's pretty far away from a "cottage industry".
Intel and Samsung are the true "cottage industries" as they do full vertical integration of IP, R&D and manufacturing under the same roof.
IMEC is more like the UN of semi companies, a place for them to come together, share knowledge and results and talk standardisation based on that.
> Fabs are optimized for utilization - throughput, not latency
I remember hearing some company trying for the speed
> A fab is not a small business!
An SBIR is just a cost effective way for the government to put a number of PhDs/engineers to work on a problem.
The time from tapeout to first samples is 3-4 months even for the biggest customers of TSMC.
Shorter for a metal only change.
Accelerating the process is an incredibly obvious desire for literally everyone in the industry and there are already gobs of money being put into R&D.
The fact of the matter is that we're dealing with physical and chemical processes. It simply takes time for atoms to move across space. In many steps of the semiconductor fab process we are literally building up the chip by single-atom thick layers.
There's very finite limits to how fast you can throw atoms at a substrate. There are finite limits to how much time a photoresist must be exposed. There are finite limits to how fast chemicals can etch the surface. You can only saw a wafer so fast, you can only physically transport dice through space so fast.
These are problems that the entire industry wants to solve. These are problems at the bleeding edge of physics. This is not something a startup is going to solve, purely because you need to already have an entire semiconductor fab to iterate in.