I mean yeah FPAA’s would be awesome and I used to wish for something like it coming from a discrete analog hobby electronics.

But in a my short two years in Analog IC design industry, i have been so divorced from the actual silicon that I rarely got a chance yet to go in lab and probe around the teeny tiny block I worked on in the complex labyrinth of the SoC. I don’t wish for it (I learnt the hard way, be careful what you wish for; and in this case, if I am in lab debugging something in silicon, means something terrible has happened to what I worked on and it might have cost the company about $200k or more), but someday soon i will get into the lab just to play around with the fancy ass oscilloscope.

In the meanwhile, I did realize the invaluable power of having a python frontend API for querying basic details of your devices. (Python and not SKILL/Lisp since it pretty much works with any AI, and is very well worked on) and AI has been okayish with it. I feel AI would be a good aid in actual circuit design if it understood the Topology of the circuit, which at this point I am tempted to say might require something akin to AST but for SPICE. However, AI has been awesome at regexes and scripting which is also the meh and boring part of the circuit design process.

The AST idea for spice is something i've thought about too. a netlist is already a graph, the LLM just can't see it that way when it's flat text. serializing it with topology intact, adjacency, port polarities, device semantics is basically what your python frontend is doing implicitly, which explains why it behaves so much better than dumping a raw netlist into the prompt.