RISC-V is a family of instruction sets (which have various chips implementing them). Think "X86-64". It looks like the baochip-1x is using the VexRiscv CPU. The HDL is available here under MIT: https://github.com/SpinalHDL/VexRiscv
RISC-V is a family of instruction sets (which have various chips implementing them). Think "X86-64". It looks like the baochip-1x is using the VexRiscv CPU. The HDL is available here under MIT: https://github.com/SpinalHDL/VexRiscv