Wow. The TI-99 is such a perfect fit for this too given the chip was designed for multi-user computing in a way other home computer chips weren’t.
All due to TI’s desire to use the same chip standards across all their machines big and small, IIRC.
Wow. The TI-99 is such a perfect fit for this too given the chip was designed for multi-user computing in a way other home computer chips weren’t.
All due to TI’s desire to use the same chip standards across all their machines big and small, IIRC.
While the CPU is a better fit than the 8 bit contemporaries, the 16kb of working memory is going to be a struggle.
It's cool because the registers are all in RAM, with a "workspace pointer" on the CPU pointing at where they are. This is slow, but a context switch is just changing that pointer.
It's not all that slow as a concept at that time when RAM speeds were as fast as CPU speeds. I think it's just that TI's implementation of the concept in that particular cost-optimised home computer was pretty bad -- the actual registers were in 256 bytes of fast static RAM, but the rest of the system memory (both ROM and RAM) was accessed very inefficiently, not only 1 bytes at a time on a 16 bit machine, but also with something like 4 wait states for every byte.
The 6502 is not very different with a very small number of registers and Zero Page being used for most of what a modern machine would use registers for. For example (unlike the Z80) there is no register-to-register add or subtract or compare -- you can only add/sub/cmp/and/or/xor a memory location to the accumulator. Also, pointers can only be done using a pair of adjacent Zero Page locations.
As long as you were using data in those in-RAM registers the TI-99/4 was around four times faster than a 1 MHz 6502 for 16 bit arithmetic -- and with a single 2-byte instruction doing what needed 7 instructions and 13 bytes of code on 6502 -- and it was also twice as fast on 8 bit arithmetic.
It was just the cheap-ass main memory (and I/O) implementation that crippled it.
Well, it has 256 bytes of RAM which is basically a really big register file, and everything else goes in the 16kb of "video RAM" which you can read and write by poking at I/O registers. So it is not easy to program.
It's arguably the only 8-bit computer which has a really different architecture from the others. You could otherwise imagine pulling the SID chip off a C-64 and putting it on a TRS-80 Color Computer etc.
Sharing the main RAM with video was a weak point in computers of that time period because the video system stole many of the memory access cycles. Some recent retrocomputers that revisit that period like
https://www.c64-wiki.com/wiki/Commander_X16
have a full-size memory bank and a video RAM memory bank which is accessed through a port which can be pretty efficient because you can auto-incremement the address register and just write 1 byte to the port to write 1 byte to video RAM and repeat.
Well I mean it fits in with the 8-bit era machines as far as performance but that CPU was absolutely 16 bit.
16-bit registers, operations, etc. yeah. A bigger machine of the TM9 series would be more like a PDP-11.
In fact it was a miniaturized TI-990 minicomputer: https://en.wikipedia.org/wiki/TI-990
Yep, but it lacks a MMU so memory protection and paging are going to require a lot of work. I think the only reason this is feasible at all is they're running the OS out of a ROM cartridge.
The PDP machines that Unix was developed on had MMUs, which they needed because the 16 bit processors couldn't address the multi-megabyte address space the hardware supported.
I'm pretty sure the Centurion doesn't run Unix.
The PDP-10 had an MMU similar to a modern MMU with page tables and such, the PDP-11 had an 8-segment-of-8kb MMU like what the TRS-80 Color Computer 3 had except the PDP-11 had a real supervisor mode and if a user mode program tried to change the MMU configuration it would fault.
Did the minicomputers of the time have MMUs?
I thought UsagiElectric showed a case where his Centurion didn’t, but I may be misremembering.
In fact the 9900 itself was used in an entire line of minicomputers that included a hardware memory map.
The 9900 is a single chip implementation of the CPU board in the TI 990. They even created a dedicated memory mapper chip to go along with the product line, though it is significantly different than the one in the minicomputer line.
(edit: the 990 was first built in the early 70s, memory mappers are quite old conceptually)
(edit 2: in fact the necessity of using a memory mapper is what killed the platform, and was one of the things that made the IBM PC team decline the 9900.)
Unfortunately I don't think that there is a reasonable way to perform real hardware-level memory protection with that chip alone. I'm working on a project documenting the genesis of the 99000 chips, which include a privilege bit in the status register, from the minicomputer line.
Essay forthcoming, and probably an OS. Maybe a year...
One chip that could be used as a memory mapper for the 9900 (but wasn't in the TI99/4A) was the 74LS670, which was used in the IBM 5150 PC to allow the 8237 DMA chip to access more than 64KB (a limit that wasn't a problem when used in a 8080 system).
Yeah it really was an interesting choice on their part. Makes sense as a move for TI. Not the target market.