That’s not realistic with any processor that does branch prediction, cache hits vs cache misses etc

You can easily compute the worst cases. All the details are in the specs of the processor.

Assuming also that you are not running on top of an operating system, running in a VM with “noisy neighbors”…

I haven’t counted cycles since programming assembly on a 65C02 where you cooks save a clock cycle by accessing memory in the first page of memory - two opcodes to do LDA $02 instead of LDA $0201

Then assumes the opposite. Build an RTOS and don’t virtualize your software on top of it.