Some anecdata: This weekend as a lark I asked Claude Code to design a (fairly simple) analog circuit and simulate it in LTSpice to verify. It did three edit-simulate-fix cycles and to my surprise ended up with something that seemed pretty sane.
That said, schematics (as opposed to netlists) don't seem to be a practical I/O format yet. It did generate a KiCad schematic file when asked, but it was pretty bad (penguin on a bicycle level).
Anyway, somehow there does seem to be some electronic tools training happening, becuase I tried this maybe a year ago and it was pretty hopeless.
This is exactly why the first version of our tool worked with netlists only. We've since evolved to parsing the full KiCad project and generating a netlist from it so we can also extract schematic-specific metadata that doesn't make it into the netlist (designer notes/annotations, component positions, etc.)
This looks great, but I want to know when LLMs will be useful for generating schematics rather than just checking them! It’s such a letdown right now to jump from doing firmware with Claude Code to drawing schematics manually like it’s 2022. :) When does KiCad get its little assistant pane on the right?
Schematic generation doesn’t really make sense to me because the cost of a problem going unnoticed is much more significant in hardware design than software.
cool, how did you connect claude to ltspice?