> The voracious demand for HBM by hyperscalers, such as Microsoft, Google, Meta and Amazon, has forced the three biggest memory manufacturers (Samsung Electronics, SK Hynix, and Micron Technology) to pivot their limited cleanroom space and capital expenditure towards higher margin enterprise-grade components. This is a zero-sum game: every wafer allocated to an HBM stack for an Nvidia GPU is a wafer denied to the LPDDR5X module of a mid-range smartphone or the SSD of a consumer laptop.

> As a result, IDC expects 2026 DRAM and NAND supply growth be below historical norms at 16% year-on-year and 17% year-on-year, respectively.

This is an odd claim. It’s like saying that car companies historically produced more coupes than sedans, but suddenly there are new enormous orders for millions of sedans. All cars get massively more expensive as a result — car makers charge 50-200% more than before. Sure, they need to retool a little bit and buy more doors, but somehow the article claims that “limited … capital expenditure” means that overall production will grow more slowly than historical rates?

This only makes sense either on extremely short timescales (as retooling distracts form expansion) or if the car makers decide not to try to compete with each other. Otherwise some of those immediately available profits would turn into increased capital expenditure and more RAM would be produced. (Heck, if RAM makers think the new demand is sustainable, they should be happy to increase production to sell more units at current prices.)