I have not seen that yet DDR5, I think the signal integrity requirements are too high now to even have unused pads open. Most sticks don’t appear to have many traces at all on the top/bottom sides, just big power/ground planes.
Also with DDR5 each stick is actually 2 channels so you get 2 extra dies.
There's some new half assed ECC type of RAM, not sure the name.
Was reading a series of displeased posts about it. Can't seem to find it now.
On die ECC for DDR5. Which corrects locally but does not signal the host or deal with data between the die and the CPU.