I think that any design firm that works on a RISC-V server CPU should seriously consider integrating CHERI support. If only because it could be a selling point, potentially making RISC-V more competitive in the server market place.

Are the specs finalized? Otherwise it will be difficult; heck, we don't even have RVA23 CPUs yet!

But I agree with you. A modern, open hardware platform with built-in hardware security would be a dream come true.