And in my inexpert experience, they are IP developed by the fab. So if you are doing CPU design work, you may need to understand PLLs well enough to read a datasheet, but you will not need to design a PLL.

I maybe had the most trouble just figuring out which instantiated PLL in the chip belonged to which PLL design, and where someone stuck the documentation in the giant repo. Especially since a hardware designer may think, oh we don’t need to update the docs, “nothing changed,” but the PLLs did change names because of a process change and their parameters may have changed slightly, even if they’re essentially the same. And chasing down small changes and documenting them ends up being a lot of the job in software.