I don't think it is so much efficiency of their chips for their hardware (phones) so much as efficiency of their OS for their chips and hardware design (like unified memory).
I don't think it is so much efficiency of their chips for their hardware (phones) so much as efficiency of their OS for their chips and hardware design (like unified memory).
It is likely the hardware effiency of their chips. Apple SoCs running industry-standard benchmarks still run very cool, yet still show dominant performance. The OS efficiency helps, but even under extreme stress tests like SPEC, the Apple SoCs dominate in perf & power.
See Lunar Lake on TSMC N3B, 4+4, on-package DRAM versus the M3 on TSMC N3B, 4+4, on-package DRAM: https://youtu.be/ymoiWv9BF7Q?t=531
The 258V (TSMC N3B) has a worse perf / W 1T curve than the Apple M1 (TSMC N5).
> It is likely the hardware effiency of their chips. Apple SoCs running industry-standard benchmarks still run very cool, yet still show dominant performance
Dieselgate?
I have heard that Apple Silicon chips are designed around the retain-release cycle that goes back to NeXT and is still here today (hidden by ARC compilation), but I don't think that's the whole story. Back when the M1's came out, many benchmarks showed virtualized Windows blowing the doors off of market-equivalent x86 CPUs.
Also, there's the obvious benefits of being TSMC's best customer. And when you design a chip for low power consumption, that means you've got a higher ceiling when you introduce cooling.
The SoC benefits are being ignored by some people here. Apple doesn't control every piece of software as some here posit, however, OS optimizations and utilization of extra-efficiency cores (though still requiring SoC design they do also need specific OS code support) are part of the performance.