I think oddities like this were a consequence of a hardware world that was rocketing along the heart of Moore’s Law, alongside a software world that hadn’t matured past multi-year product cycles.
When OS/2 for PowerPC was set in motion, that Intel would “Make CISC Great Again” with the Pentium was far from clear.
I remember that the "general consensus" was that RISC was gonna win, it was just a matter of when (and when it could be affordable). What was NOT certain was which RISC architecture would come out ahead, so there was a bunch of porting to "remove the risk" - later they would unport most everything and "remove the RISC".
Pentium shook that tree a bit, and Pentium II really razzle-dazzled it.
Well, the thing is that RISC did win. It is just that the RISC that won is the one that Intel baked into their x86 chips.
The Pentium introduced the idea of micro op codes though the Pentium Pro was the first chip to really run with it. The CISC x86 instructions were converted into simpler instructions internally. These micro op codes could be pipe-lined, executed in parallel, and executed out-of-order.
If the Pentium II really razzle-dazzled, it did it with RISC architecture at its core. The CISC instruction decoder added a bit of die size but that did not matter much and Intel had leading-edge manufacturing tech.
The internal parallelism was also put to good use by adding SIMD instructions (MMX). These first appeared in the Pentium MMX and Pentium II but the Pentium III did it much better and of course Intel has continued to add more powerful SIMD stuff over time.
RISC did not win only inside Intel chips of course. Every successful ISA since the 90's has been RISC including ARM and RISC-V. But even RISC chips feature some complex instructions these days.
I'd argue (to some extent) that the proliferation of SIMD instructions demonstrates that RISC did lose, not just the practical war, but also the conceptual one. i.e. we creates many many similiar instructions today, which seems to go against the ethos of RISC.